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dc.contributor.authorBuchanan, Ireneen
dc.date.accessioned2016-01-20T09:59:46Z
dc.date.available2016-01-20T09:59:46Z
dc.date.issued1980
dc.identifier.urihttp://hdl.handle.net/1842/13224
dc.description.abstracten
dc.publisherThe University of Edinburghen
dc.relation.ispartofKB thesis scanning project 2015en
dc.titleModelling and verification in structured integrated circuit designen
dc.typeThesis or Dissertationen
dc.type.qualificationlevelDoctoralen
dc.type.qualificationnamePhD Doctor of Philosophyen


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