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dc.contributor.advisorHenderson, Roberten
dc.contributor.advisorUnderwood, Ianen
dc.contributor.advisorDhaliwal, Kanwaldeepen
dc.contributor.authorAl Abbas, Tareken
dc.date.accessioned2019-08-06T10:50:08Z
dc.date.available2019-08-06T10:50:08Z
dc.date.issued2019-07-03
dc.identifier.urihttp://hdl.handle.net/1842/35970
dc.description.abstractSince their integration in complementary metal oxide (CMOS) semiconductor technology in 2003, single photon avalanche diodes (SPADs) have inspired a new era of low cost high integration quantum-level image sensors. Their unique feature of discerning single photon detections, their ability to retain temporal information on every collected photon and their amenability to high speed image sensor architectures makes them prime candidates for low light and time-resolved applications. From the biomedical field of fluorescence lifetime imaging microscopy (FLIM) to extreme physical phenomena such as quantum entanglement, all the way to time of flight (ToF) consumer applications such as gesture recognition and more recently automotive light detection and ranging (LIDAR), huge steps in detector and sensor architectures have been made to address the design challenges of pixel sensitivity and functionality trade-off, scalability and handling of large data rates. The goal of this research is to explore the hypothesis that given the state of the art CMOS nodes and fabrication technologies, it is possible to design miniature SPAD image sensors for time-resolved applications with a small pixel pitch while maintaining both sensitivity and built -in functionality. Three key approaches are pursued to that purpose: leveraging the innate area reduction of logic gates and finer design rules of advanced CMOS nodes to balance the pixel’s fill factor and processing capability, smarter pixel designs with configurable functionality and novel system architectures that lift the processing burden off the pixel array and mediate data flow. Two pathfinder SPAD image sensors were designed and fabricated: a 96 × 40 planar front side illuminated (FSI) sensor with 66% fill factor at 8.25μm pixel pitch in an industrialised 40nm process and a 128 × 120 3D-stacked backside illuminated (BSI) sensor with 45% fill factor at 7.83μm pixel pitch. Both designs rely on a digital, configurable, 12-bit ripple counter pixel allowing for time-gated shot noise limited photon counting. The FSI sensor was operated as a quanta image sensor (QIS) achieving an extended dynamic range in excess of 100dB, utilising triple exposure windows and in-pixel data compression which reduces data rates by a factor of 3.75×. The stacked sensor is the first demonstration of a wafer scale SPAD imaging array with a 1-to-1 hybrid bond connection. Characterisation results of the detector and sensor performance are presented. Two other time-resolved 3D-stacked BSI SPAD image sensor architectures are proposed. The first is a fully integrated 5-wire interface system on chip (SoC), with built-in power management and off-focal plane data processing and storage for high dynamic range as well as autonomous video rate operation. Preliminary images and bring-up results of the fabricated 2mm² sensor are shown. The second is a highly configurable design capable of simultaneous multi-bit oversampled imaging and programmable region of interest (ROI) time correlated single photon counting (TCSPC) with on-chip histogram generation. The 6.48μm pitch array has been submitted for fabrication. In-depth design details of both architectures are discussed.en
dc.contributor.sponsorEngineering and Physical Sciences Research Council (EPSRC)en
dc.language.isoen
dc.publisherThe University of Edinburghen
dc.relation.hasversionT. A. Abbas, N. A. W. Dutton, O. Almer, S. Pellegrini, Y. Henrion and R. K. Henderson, “Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology,” 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 2016, pp. 8.1.1- 8.1.4.en
dc.relation.hasversionT. Al Abbas, N. A. W. Dutton, O. Almer, F. M. Della Rocca, S. Pellegrini, B. Rae, D. Golanski and R. K. Henderson, “8.25μm Pitch 66% Fill Factor Global Shared Well SPAD Image Sensor in 40nm CMOS FSI Technology,” in International Image Sensors Workshop, 2017.en
dc.relation.hasversionT. Al Abbas, N. A. W. Dutton, O. Almer, N. Finlayson, F. M. D. Rocca and R. Henderson, “A CMOS SPAD Sensor With a Multi-Event Folded Flash Time-to-Digital Converter for Ultra-Fast Optical Transient Capture,” in IEEE Sensors Journal, vol. 18, no. 8, pp. 3163-3173, 15 April15, 2018.en
dc.relation.hasversionN. Dutton, T. Al Abbas, I. Gyongy, F. Mattioli Della Rocca, and R. Henderson, “High Dynamic Range Imaging at the Quantum Limit with Single Photon Avalanche Diode-Based Image Sensors,” Sensors, vol. 18, no. 4, p. 1166, Apr. 2018.en
dc.relation.hasversionT. Al Abbas, O. Almer, S. W. Hutchings, A. T. Erdogan, I. Gyongy, N. A. W. Dutton and R. K. Henderson, “A 128×120 5-Wire 1.96mm² 40nm/90nm 3D Stacked SPAD Time Resolved Image Sensor SoC for Microendoscopy,” in Symposium on VLSI Circuits, 2019.en
dc.relation.hasversionT. Al Abbas, D. Chitnis and R. K. Henderson, “Dual Layer 3D-Stacked High Dynamic Range SPAD Pixel,” in International Image Sensors Workshop, 2019.en
dc.relation.hasversionO. Almer, D. Tsonev, N. A. W. Dutton, T. Al Abbas, S. Videv, S. Gnecchi, H. Haas and R. K. Henderson, “A SPAD-Based Visible Light Communications Receiver Employing Higher Order Modulation,” 2015 IEEE Global Communications Conference (GLOBECOM), San Diego, CA, 2015, pp. 1-6.en
dc.relation.hasversionNeil Finlayson, Tarek Al Abbas, Francescopaolo Mattioli Della Rocca, Oscar Almer, Salvatore Gnecchi, Neale A. W. Dutton, Robert K. Henderson, “Hypervelocity time-of-flight characterisation of a 14GS/s histogramming CMOS SPAD sensor,” Proc. SPIE 10111, Quantum Sensing and Nano Electronics and Photonics XIV, 101112Z (27 January 2017).en
dc.relation.hasversionI. Gyongy, T. Al Abbas, N. A. W. Dutton and R. K. Henderson, “Object Tracking and Reconstruction with a Quanta Image Sensor,” in International Image Sensors Workshop, 2017.en
dc.relation.hasversionN. A. W. Dutton, T. Al Abbas, I. Gyongy and R. K. Henderson, “Extending the Dynamic Range of Oversampled Binary SPAD Image Sensors,” in International Image Sensors Workshop, 2017.en
dc.relation.hasversionF. Mattioli Della Rocca, T. A. Abbas, N. A. W. Dutton and R. K. Henderson, “A high dynamic range SPAD pixel for time of flight imaging,” 2017 IEEE SENSORS, Glasgow, 2017, pp. 1-3.en
dc.relation.hasversionI. Underwood, H. Mai, T. Al Abbas, I. Gyongy, N. A. W. Dutton and R. K. Henderson, “Invited Paper: Single-Photon-Capable Detector Arrays in CMOS – Exploring a New Tool for Display Metrology,” in International Conference on Display Technology (ICDT), 2018.en
dc.relation.hasversionI. Gyongy, T. Al Abbas, N. Finlayson, N. Johnston, N. Calder, A. Erdogan, N. A. W. Dutton, R. Walker and R. K. Henderson, “Advances in CMOS SPAD Sensors for LIDAR Applications,” Proc. SPIE 10799, Emerging Imaging and Sensing Technologies for Security and Defence III; and Unmanned Sensors, Systems, and Countermeasures, 1079907 (4 October 2018).en
dc.relation.hasversionR. K. Henderson, N. Johnston, S. W. Hutchings, I. Gyongy, T. Al Abbas, N. A. W. Dutton, M. Tyler, S. Chan and J. Leach, “A 256×256 40nm/90nm CMOS 3D-Stacked 120dB Dynamic-Range Reconfigurable Time-Resolved SPAD Imager,” 2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, 2019, pp. 106-108.en
dc.relation.hasversionJ. Kosman, O. Almer, T. Al Abbas, N. A. W. Dutton, R. Walker, S. Videv, K. Moore, H. Haas and R. K. Henderson, “A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light Communications,” 2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, 2019, pp. 468-470.en
dc.subjectSPADsen
dc.subjectminiature SPAD image sensorsen
dc.subjectpixel pitchen
dc.subjectSoCen
dc.subjectTCSPCen
dc.titleMiniature high dynamic range time-resolved CMOS SPAD image sensorsen
dc.typeThesis or Dissertationen
dc.relation.referencesO. Almer, N. A. W. Dutton, T. A. Abbas, S. Gnecchi and R. K. Henderson, “4-PAM visible light communications with a XOR-tree digital silicon photomultiplier,” 2015 IEEE Summer Topicals Meeting Series (SUM), Nassau, 2015, pp. 41-42.en
dc.type.qualificationlevelDoctoralen
dc.type.qualificationnamePhD Doctor of Philosophyen


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