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dc.contributor.advisorNagarajan, Vijayanand
dc.contributor.advisorStark, Ian
dc.contributor.advisorJackson, Paul
dc.contributor.authorOswald, Nicolai Alexander
dc.date.accessioned2023-05-24T14:00:23Z
dc.date.available2023-05-24T14:00:23Z
dc.date.issued2023-05-24
dc.identifier.urihttps://hdl.handle.net/1842/40610
dc.identifier.urihttp://dx.doi.org/10.7488/era/3375
dc.description.abstractCache coherence protocols are often specified using only stable states and atomic transactions for a single cache hierarchy level. Designing highly-concurrent, hierarchical and heterogeneous directory cache coherence protocols from these atomic specifications for modern multicore architectures is a complicated task. To overcome these design challenges we have developed the novel *Gen algorithms (ProtoGen, HieraGen and HeteroGen). Using the *Gen algorithms highly-concurrent, hierarchical and heterogeneous cache coherence protocols can be automatically generated for a wide range of atomic input stable state protocol (SSP) speci fications - including the MOESI variants, as well as for protocols that are targeted towards Total Store Order and Release Consistency. In addition, for each *Gen algorithm we have developed and published an eponymous tool. The ProtoGen tool takes as input a single SSP (i.e., no concurrency) generating the corresponding protocol for a multicore architecture with non-atomic transactions. The ProtoGen algorithm automatically enforces the correct interleaving of conflicting coherence transactions for a given atomic coherence protocol specification. HieraGen is a tool for automatically generating hierarchical cache coherence protocols. Its inputs are SSPs for each level of the hierarchy and its output is a highly concurrent hierarchical protocol. HieraGen thus reduces the complexity that architects face by offloading the challenging task of composing protocols and managing concurrency. HeteroGen is a tool for automatically generating heterogeneous protocols that adhere to precise consistency models. As input, HeteroGen takes SSPs of the per-cluster coherence protocols, each of which satisfies its own per-cluster consistency model. The output is a concurrent (i.e., with transient states) heterogeneous protocol that satisfies a precisely defined consistency model that we refer to as a compound consistency model. To validate the correctness of the *Gen algorithms, the generated output protocols were verified for safety and deadlock freedom using a model checker. To verify the correctness of protocols that need to adhere to a specific compound consistency model generated by HeteroGen, novel litmus tests for multiple compound consistency models were developed. The protocols automatically generated using the *Gen tools have a comparable or better performance than manually generated cache coherence protocols, often discovering opportunities to reduce stalls. Thus, the *Gen tools reduce the complexity that architects face by offloading the challenging tasks of composing protocols and managing concurrency.en
dc.contributor.sponsorGoogle PhD Fellowshipen
dc.language.isoenen
dc.publisherThe University of Edinburghen
dc.relation.hasversionN. Oswald, ”ProtoGen: Automatically Generating Directory Cache Coherence Protocols from Atomic Specifications,”, Master of Science by Research Thesisen
dc.relation.hasversionN. Oswald, V. Nagarajan and D. J. Sorin, ”ProtoGen: Automatically Generating Directory Cache Coherence Protocols from Atomic Specifications,” 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), 2018, pp. 247-260, doi: 10.1109/ISCA.2018.00030.en
dc.relation.hasversionN. Oswald, V. Nagarajan and D. J. Sorin, ”HieraGen: Automated Generation of Concurrent, Hierarchical Cache Coherence Protocols,” 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020, pp. 888-899, doi: 10.1109/ISCA45697.2020.00077en
dc.relation.hasversionN. Oswald, V. Nagarajan, D. J. Sorin, V. Gavrielatos, T. Olausson and R. Carr, ”HeteroGen: Automatic Synthesis of Heterogeneous Cache Coherence Protocols,” 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2022, pp. 756-771, doi: 10.1109/HPCA53966.2022.00061.en
dc.relation.hasversionAndres Goens, Soham Chakraborty, Susmit Sarkar, Sukarn Agarwal, Nicolai Oswald, ´ and Vijay Nagarajan. Compound Memory Models. In 44th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), 2023en
dc.relation.hasversionVasilis Gavrielatos, Antonios Katsarakis, Arpit Joshi, Nicolai Oswald, Boris Grot, and Vijay Nagarajan. Scale-out CcNUMA: Exploiting Skew with Strongly Consistent Caching. In Proceedings of the Thirteenth EuroSys Conference, EuroSys ’18, New York, NY, USA, 2018. Association for Computing Machinery.en
dc.relation.hasversionAdarsh Patil, Vijay Nagarajan, Rajeev Balasubramonian, and Nicolai Oswald. Dve:´ Improving DRAM Reliability and Performance On-Demand via Coherent Replication. In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), pages 526–539, 2021en
dc.subjectcache coherence protocolsen
dc.subjectgen algorithmsen
dc.subjectProtoGenen
dc.subjectHieraGenen
dc.subjectHeteroGenen
dc.subjectstable state protocolen
dc.subjectSSPen
dc.subjectautomatically generated protocolsen
dc.titleAutomatic generation of highly concurrent, hierarchical and heterogeneous cache coherence protocols from atomic specificationsen
dc.typeThesis or Dissertationen
dc.type.qualificationlevelDoctoralen
dc.type.qualificationnamePhD Doctor of Philosophyen


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